Voltage regulation is commonly required to prevent variations in the supply voltage powering various microelectronic components such as digital ICs, semiconductor memories, display modules, hard disk drives, RF circuitry, microprocessors, digital signal processors and analog ICs, especially in battery powered application such as cell phones, notebook computers and consumer products.
Since the battery or DC input voltage of a product often must be stepped-up to a higher DC voltage, or stepped-down to a lower DC voltage, such regulators are referred to as DC-to-DC converters. Step-down converters, commonly referred to as Buck converters, are used whenever a battery's voltage is greater than the desired load voltage. Step-down converters may include inductive switching regulators, capacitive charge pumps, and linear regulators. Conversely, step-up converters, commonly referred to boost converters, are needed whenever a battery's voltage is lower than the voltage needed to power the load. Step-up converters may include inductive switching regulators or capacitive charge pumps.
Inductive Switching Converters
Of the voltage regulators referred to above, the inductive switching converter can achieve superior performance over the widest range of currents, input voltages and output voltages. The fundamental principal of a DC/DC inductive switching converter is that the current in an inductor (coil or transformer) cannot be changed instantly and that an inductor will produce an opposing voltage to resist any change in its current.
By using one or more transistors switching at a high frequency to repeatedly magnetize and de-magnetize an inductor, the inductor can be used to step-up or step-down the converter's input voltage, producing an output voltage that is different from its input voltage. The transistors are typically MOSFETs with a low on-state resistance, commonly referred to as “power MOSFETs.” Using feedback from the converter's output voltage to control the switching conditions, a constant, well-regulated output voltage can be maintained despite rapid changes in the converter's input voltage or output current.
To remove any AC noise or ripple generated by the switching action of the transistors, an output capacitor is placed across the output terminals of the switching regulator circuit. Together the inductor and the output capacitor form a “low-pass” filter able to prevent most of the transistors' switching noise from reaching the load. The switching frequency, typically 1 MHz or more, must be high relative to the resonant frequency of the filter's “LC” tank. Averaged across multiple switching cycles, the switched inductor behaves like a programmable current source with a slow-changing average current.
Since the average inductor current is controlled by transistors that are either biased as “on” or “off” switches, the power dissipation in the transistors is theoretically small, and high converter efficiencies, in range of 80% to 90%, can be realized. Specifically, when a power MOSFET is biased as an on-state switch using a “high” gate bias, it exhibits a linear I-V drain characteristic with a low RDS(on) resistance, typically 200 milliohms or less. At a current of 0.5 A, for example, such a device will exhibit a maximum voltage drop ID·RDS(on) of only 100 mV despite its high drain current. The power dissipated during its on-state conduction time is equal to ID2·RDS(on). In the example given above, the power dissipation during the time the transistor is conducting is equal to (0.5 A)2·(0.2Ω), or 50 mW.
In its off state, a power MOSFET has its gate connected to its source, so that its source-to-gate voltage VGS=0. Even with a drain voltage VDS equal to a converter's battery input voltage Vbatt, a power MOSFET's drain current IDSS is very small, typically well below one microampere and more generally in the range of nanoamperes. The current IDSS consists primarily of junction leakage.
Thus, a power MOSFET used as a switch in a DC/DC converter is efficient because in its off condition it exhibits low currents at high voltages, and in its on state it exhibits high currents at low voltages. Ignoring switching transients, the ID·VDS product in the power MOSFET remains small, and power dissipation in the switch remains low. If the duration of the transistor switching events is relatively short compared to the period between switching events, the power loss during switching can be considered negligible or, alternatively, treated as a fixed power loss. At multi-megahertz switching frequencies, however, the switching waveform analysis becomes more significant and must be considered by analyzing the drain voltage, drain current, and gate voltage of the transistor as a function of time.
Buck Converter Operation
Shown in FIG. 1A is a common non-isolated step-down DC/DC converter topology of a Buck converter 1. Buck converter 1 includes a power MOSFET 4, an inductor 6, a Schottky diode 7, and a capacitor 9. With its positive terminal connected to the input battery voltage Vbatt, MOSFET 4 acts like a “high-side” switch connecting to and controlling the current in inductor 6. Operation of MOSFET 4 is controlled by a pulse-width modulation (PWM) controller 2, with a gate buffer 3 driving the gate of MOSFET 4. Power MOSFET 4 may be a P-channel or N-channel MOSFET, with appropriate adjustments to gate buffer 3. Diode 5 is a P-N junction parasitic to MOSFET 4, in parallel with its drain and source, and connected in a polarity such that diode 5 remains reverse-biased under normal operating conditions.
Schottky diode 7 has its cathode tied to MOSFET 4 and to inductor 6, an electrical node labeled by the voltage Vx. Capacitor 8 represents the capacitance parasitic to Schottky diode 7. Load 10 represents an electrical load connected to the output terminal of converter 1. The output voltage Vout is fed back to the input terminal of PWM controller 2 as a feedback voltage VFB, which controls the current IL in inductor 6 by controlling the switching of MOSFET 4.
Converter 1 is categorized as a “non-synchronous” or “conventional” Buck converter, since rectifier 7 is a diode rather than a MOSFET. Diode 7 conducts when MOSFET 4 is off, and must carry the full current IL through inductor 6 during such intervals. The power dissipation in Schottky diode 7 during conduction is IL·Vf, where Vf is the forward voltage drop across Schottky diode 7. In this circuit a Schottky diode is used instead of a silicon P-N rectifier diode because Schottky diodes have a lower forward voltage drop and lower power dissipation. A Schottky diode typically has a Vf under 400 mV, as compared to a Vf of approximately 700 mV in a silicon P-N rectifier diode. Despite this, the power dissipation in Schottky diode 7 can be substantial, lowering the efficiency of converter 1 and creating thermal dissipation issues.
Under the operation of PWM controller 2, Buck converter 1 exhibits a voltage waveform at node Vx of the kind shown in FIG. 2A. Prior to time t1 the high side MOSFET 4 is in its on state, acting as a switch with a resistance RDS(switch). The voltage at node Vx and across rectifier diode 7 is then equal to Vbatt−IL·RDS(switch), a voltage that ideally is close to the input voltage Vbatt. The voltage across the “off” Schottky diode 7 is illustrated by point 40 in the I-V characteristic of Schottky diode 7, shown in FIG. 3A. While the current appears to be “zero” on right side of the linear graph, a small leakage current flows through Schottky diode 7 when it is reverse-biased.
Referring again to FIG. 2A, at time t1, the high-side MOSFET 4 is turned off and inductor 6 rapidly drives the voltage Vx negative until Schottky diode 7 conducts, clamping Vx to minus the forward voltage drop Vf of Schottky diode 7, a voltage slightly below ground, as shown in by point 41 in FIG. 3A. During this transition, some negative overshoot and ringing beyond −Vf occurs due to stray inductances associated with the components' bond wires and with conductive traces on the printed circuit board.
The voltage Vx remains at −Vf until PWM controller 2 turns on the high side power MOSFET 4 at time t2. Schottky diode 7 then rapidly becomes reverse-biased, as the voltage Vx returns to its starting condition. When MOSFET 4 starts to conduct, the entire supply voltage Vbatt is present across its drain-to-source terminals, i.e. VDS≈Vbatt. Therefore, during this interval the drain-to source voltage VDS of MOSFET 4 is greater than its gate-to-source voltage VGS.
In this condition, MOSFET 4 is temporarily in its saturated region of operation and behaves as a controlled current source rather than a switch. In saturation, a MOSFET is biased into an “on” state by enhancing its gate potential, thereby inverting the silicon beneath its gate to form a conductive channel. In the presence of a high drain-to-source voltage, the MOSFET “saturates” and exhibits a drain current relatively independent of its drain-to-source voltage.
As the saturated MOSFET 4 conducts current, it forces the low-side Schottky diode 7 into its off-state by reverse-biasing it, removing any stored minority carrier charge present within its junction. The process of removing charge stored in a diode by reverse-biasing it immediately following forward conduction is referred to as forced diode recovery, or “reverse recovery.” In a Schottky diode, however, since very few minority carriers are present during conduction, the reverse recovery period can be very short or even negligible.
After the reverse recovery of diode 7, the voltage Vx rises and VDS falls below VGS in the on-state MOSFET 4. When this happens, MOSFET 4 moves out of saturation and into its linear region of operation, an operating condition where ID exhibits a linear relationship with VDS and MOSFET 4 behaves like gate-controlled variable resistance. The resulting voltage transient dVx/dt depends on the parasitic capacitances and inductance in the circuit and the nature of the reverse recovery of Schottky diode 7. High transient rates can cause ringing, leading to conducted and radiated noise and associated electromagnetic interference. Some ringing can lead to overshoot above the input voltage Vbatt as a result of stray inductance in the circuit, particularly associated with Schottky diode 7, and may inadvertently forward-bias the P-N junction in the normally off parasitic diode 5.
The circuit is self-timed in the sense that only MOSFET 4 is under the control of PWM controller 2. Schottky diode 7 responds to the conditions imposed on it by inductor 6 and MOSFET 4, and does not require an independent control signal to determine when it conducts. The operating sequence of the non-synchronous Buck converter is summarized in Table 1:
TABLE 1ModeHigh-SideLow-SideIL DirectionDiode BiasMagnetizationOn SwitchNoneTo OutputReverse Bias(RDS)(RB)RecirculationOffNoneForward Bias(FB)RecoveryOn CurrentNoneReverseSourceRecovery
As shown in Table 1, the switching sequence of a conventional Buck converter includes: charging the output capacitor and magnetizing the inductor through an on-state high-side MOSFET, recirculating inductor current through a forward biased Schottky rectifier while the MOSFET is off, and then turning the high-side MOSFET back on. In the last phase, referred to as “recovery”, when the high-side MOSFET is turned on again, the voltage at the node between the high-side MOSFET and the inductor is initially below ground. After recovery, the entire cycle is repeated.
In summary, a conventional Buck converter comprises a single high-side power MOSFET operated as a switch, with a variable on-time that is used to control an output voltage, and a Schottky rectifier which must carry the inductor's full recirculation current, whenever the MOSFET switch is turned off.
Synchronous Buck Converter Operation
An alternative version of a Buck converter, known as a synchronous Buck converter, replaces the Schottky rectifier diode with a power MOSFET, where the power MOSFET is synchronized, i.e. controlled, to conduct whenever the other power MOSFET is switched off. A synchronous Buck converter therefore requires two power MOSFETs configured as a half-bridge or push-pull output to drive the inductor, where the low-side or ground-connected synchronous rectifier MOSFET is turned on when the high-side power MOSFET is turned off.
Since a MOSFET operated as a switch exhibits a linear I-V characteristic, it can be made sufficiently large to exhibit a low on-state resistance and a voltage drop lower than that of a Schottky diode. The synchronous rectifier MOSFET is generally in parallel with a diode, either a parasitic P-N junction diode or a discrete Schottky diode. The synchronous rectifier MOSFET, when conducting, shunts current from the diode and diverts it into the “channel” of the MOSFET. The addition of a synchronous rectifier complicates the operation of a Buck converter, since a break-before-make circuit is needed to guarantee that, during switching transitions, a brief moment exists when both MOSFETs are turned off, i.e. no current flows through either MOSFET.
An example of a synchronous Buck converter 20 is shown in FIG. 1B. Buck converter 20 comprises a power MOSFET 25, an inductor 27, a synchronous rectifier power MOSFET 28 in parallel, as described above, with a parasitic P-N diode 29, and an output filter capacitor 31. Operation of MOSFET 25 is controlled by a pulse-width modulation (PWM) controller 21, with a gate buffer 23 driving the gate of MOSFET 25. While PWM controller 21 is referred to as a “PWM controller,” implying fixed-frequency variable-pulse-width operation, it may alternatively operate in a variable frequency, sometimes referred to as pulse-frequency-modulation (PFM) mode, where the clock period is allowed to vary, or alternatively alternating between PFM and PWM modes depending on load and input conditions. The term “PFM” is ambiguous as to whether a transistor's on time, off time, or both are varying. It is included here only as a reference to prior art terminology and is not used herein.
The energy input from the power source, a battery or other power input, is switched or gated through MOSFET 25. With its positive terminal connected to the battery or other power input, MOSFET 25 acts like a “high-side” switch controlling the current in inductor 27. Diode 26 is a P-N junction parasitic to MOSFET 25, in parallel with its drain and source. Capacitor 30 represents the capacitance parasitic to P-N diode 29.
By controlling the switching and on-time of MOSFET 25, the energy stored in the magnetic field of inductor 27 can be adjusted dynamically to control the voltage on output filter capacitor 31. The output voltage Vout is fed back as a voltage VFB to the input of PWM controller circuit 21, which controls the current IL in inductor 27 through the repeated switching of MOSFET 25. Load 32 represents an electrical load connected to the output of Buck converter 20.
Driven out of phase with MOSFET 25 by gate buffer 24, synchronous rectifier MOSFET 28 conducts during a portion of the time when MOSFET 25 is off. In prior art synchronous Buck converters, synchronous rectifier MOSFET 28 never conducts when high-side MOSFET 25 is on and conducting. With its positive terminal connected to the inductor 27, i.e. to the node at which the intermediate voltage Vx is present, and with its negative terminal connected circuit ground, MOSFET 28 acts like a “low-side” switch, shunting the current in diode 29. Diode 29 is a P-N junction parasitic to synchronous rectifier MOSFET 28, in parallel with its drain and source, and diode 29 therefore conducts substantial current only during the brief interval when both MOSFETs 25 and 28 are off, i.e. during the break-before-make interval, aided by parallel capacitor 30, shunting some fraction of the current transient.
Break-before-make (BBM) circuit 22 prevents shoot-through conduction by guaranteeing that MOSFETs 25 and 28 do not conduct simultaneously so as to short or “crow-bar” the input and power source of converter 20. During this brief BBM interval, diode 29 must, along with capacitor 30, carry the current IL through inductor 27. The break-before make interval occurs twice in one full cycle—once in the transition immediately after the high-side MOSFET 25 turns off before the synchronous rectifier MOSFET 28 turns on and a second time after the synchronous rectifier MOSFET 28 turns off but immediately before the high side MOSFET 25 turns on. In prior art synchronous Buck converters, synchronous rectifier MOSFET 28 never conducts during the break-before-make interval.
The BBM interval, while necessarily preventing shoot through conduction, can lead to a variety of conditions giving rise to oscillations and electrical noise. Noise in a synchronous Buck converter can be especially problematic during the interval after the synchronous rectifier has turned off just as the high side MOSFET turns on again, creating a transient condition known as “forced diode recovery”. Noisy operation may also arise when using a synchronous rectifier under “light load” conditions, when the load is drawing low current and the current in the inductor can actually change direction temporarily.
Under normal PWM operation, synchronous Buck converter 20 exhibits a waveform on node Vx as shown in FIG. 2B. Prior to time t1 the high-side MOSFET 25 is in its on state acting as a switch with a resistance RDS(switch). The intermediate voltage Vx at the node between MOSFETs 25 and 28 and inductor 27 is then equal to Vbatt−IL·RDS(switch), a voltage ideally close to the input voltage Vbatt, and both diode 26 and diode 29 are reverse biased. The voltage across the “off” rectifier diode 29 is illustrated at point 42 in the I-V characteristic of diode 29, shown in FIG. 3B. While the current appears to be “zero” on the linear graph, some leakage current flows through diode 29 under reverse bias conditions, albeit less than the leakage current that would flow through a Schottky diode.
At time t1, high-side MOSFET 25 is turned off and the inductor 27 rapidly drives the voltage Vx negative until P-N diode 29 conducts, clamping the voltage Vx to the negative of the forward conducting voltage Vf of diode 29, a voltage slightly below ground, as shown in by point 43 in the graph of FIG. 3B. Some overshoot and ringing occurs due to stray inductances associated with the components' bond wires and printed circuit board conductive traces. The transient behavior at time t1, when the high-side transistor 25 turns off is similar to that of conventional Buck converter 1. In contrast to Buck converter 1, however, conduction in diode 29 persists only for a limited duration tBBM as determined by the break-before-make interval, and diode 29 need not carry the full current IL through inductor 27 during the entire recirculation stage.
At time t2, equal to t1+tBBM, low-side synchronous rectifier MOSFET 28 turns-on and shunts a substantial portion of the current flowing in diode 29. The below ground potential of VX is then reduced from −Vf to −IL·RDS(sync rect), a voltage closer to zero as illustrated by point 44 in FIG. 3B. In the interval between time t2 and time t3, the current in inductor 27 re-circulates through synchronous rectifier MOSFET 28. Synchronous rectifier MOSFET 28 remains on until PWM controller 21 determines that the high side-MOSFET 25 must again be turned on.
Provided this interval of conduction through synchronous rectifier MOSFET 28 is not too long or the average inductor current IL is not too low, the polarity of the current IL flowing in inductor 27 will remain in the direction toward the output terminal of converter 20 and energy will flow from converter 20 toward its output terminal and into capacitor 31, a current direction we designate herein as “To Output”.
The transition to conduction through high-side MOSFET 25 in synchronous Buck converter 20 involves first switching off the low-side synchronous rectifier MOSFET 28 for a second break-before-make interval tBBM, during which time MOSFETs 25 and 28 are both “off”, and letting the voltage across the forward conducting rectifier diode 29 temporarily return to a value of −Vf. as illustrated by point 43 in FIG. 3B. This occurs in the interval between time t3 and time t4 in FIG. 2B.
During this interval, stored charge once again begins to accumulate in the low-side rectifier diode 29. Since diode 29 represents a silicon P-N junction intrinsic to synchronous rectifier MOSFET 28 rather than a Schottky diode, it stores more charge and exhibits a higher forward voltage drop than Schottky diode 7 in Buck-converter 1. This additional stored charge adversely impacts the switching transition at time t4, following the break-before-make interval.
Prior to time t4, the voltage Vx remains at −Vf until the high side power MOSFET 26 turns back on and begins to conduct current. The forward conducting P-N rectifier diode 29 then becomes rapidly reverse-biased. Before the voltage Vx can rise, however, all of the charge stored in rectifier diode 28 must be depleted. This circuit behavior is illustrated schematically by parasitic capacitor 30 to emulate prolonged conduction in P-N diode 29 resulting in the postponed rise of voltage Vx. Such operation is referred to as diode recovery.
At the onset of this switching transition, as the gate voltage of high-side MOSFET 25 is ramped up and Vx is near ground potential, MOSFET 25 is temporarily biased with a drain-to-source voltage greater than its gate bias, i.e. |VDS|>|VGS|, and MOSFET 25 is “saturated.” A saturated MOSFET behaves as a programmable current source where the drain current is strongly dependent on its gate bias but only minimally affected by its drain voltage. The switching waveform of conduction current in saturated MOSFET 25 influences the voltage transient across diode 29 as it recovers. If the voltage rise across the diode 29 is gradual, power dissipation in diode 29 is increased but the voltage switching transient may be relatively low in noise.
Conversely, if the voltage across diode 29 rises rapidly, power dissipation in diode 29 may be reduced, but significant overshoot and ringing can occur in the voltage Vx. Such behavior, referred to as “snappy” diode recovery, can lead to unwanted conducted and radiated noise and electromagnetic interference impacting both load and input connected circuitry and overall circuit performance. In some instances the voltage Vx may “ring” above the input voltage Vbatt as a result of stray inductance in the circuit, and lead to unwanted forward biasing of high-side diode 26, which in turn can lead to more charge storage, oscillations and circuit instability.
During diode recovery, high-side MOSFET 25 is on and saturated like a current source but does not exhibit as a constant current because its gate is ramping as it tries to pull Vx high. Because diode 29 holds the Vx voltage near ground, MOSFET 25 is unavoidably saturated and behaves as a ramped current source until diode 29 recovers and Vx rises. This condition actually lowers the converter's efficiency for two reasons. One reason is that the diode recovery current represents a power loss needed to extract minority carriers or supply recombination current until the diode 29 recovers and turns off. The diode recovery current behaves similar to shoot-through current since it supplied directly across the battery input terminals of the converter.
The other power loss occurs because MOSFET 25 is supporting high VDS drain voltage and increasing current simultaneously and therefore burns instantaneous power of magnitude Pxover=ID(t)·VDS(t). This loss is sometimes referred to as the MOSFET's switching or “cross-over” loss Pxover. Since the total power is the time integral of Pxover, it is most efficient to limit the time which MOSFET 25 remains in this condition with VDS≈Vbatt. Unfortunately, diode 29 prevents the VDS from dropping until recovery is nearly complete.
The subject of diode recovery is discussed in greater detail in the next section of this application.
After the recovery of diode 29, Vx rises and the drain-to-source voltage across high-side MOSFET 25 drops commensurately as the transistor eventually moves into its linear, i.e. variable resistor, mode of operation. The magnetization of inductor 27 again commences and the cycle begins anew.
Unlike the conventional Buck converter, where a single active MOSFET transistor is under control of a PWM controller, a synchronous Buck converter requires the control of two power MOSFETs driven to conduct out of phase and never to conduct simultaneously. As described, the operating sequence of a synchronous Buck converter under normal load conditions is summarized in the Table 2:
TABLE 2ModeHigh-SideLow-SideIL DirectionDiode BiasMagnetizationOn Switch (RDS)OffTo OutputReverse Bias (RB)BBMOffOffForward Bias (FB)RecirculationOffOn Switch (RDS)Shunted FBBBMOffOffForward Bias (FB)RecoveryOn CurrentOffReverseSource (Ramp)Recovery
As illustrated, the switching sequence of a synchronous Buck converter under normal load conditions comprises charging the output capacitor and magnetizing the inductor through a high-side MOSFET, turning off the high-side MOSFET and recirculating inductor current through a forward biased rectifier during a first BBM interval, turning-on and shunting the rectifier diode current through a synchronous rectifier MOSFET, turning off the synchronous rectifier MOSFET and again recirculating inductor current through the forward biased rectifier diode during a second BBM interval, and then turning the high-side MOSFET back on. In the last phase, referred to as “recovery”, the voltage VX is initially below ground at the time of turn-on the high-side MOSFET. After recovery, the entire cycle is repeated. Note that the synchronous rectifier MOSFET is never on and conducting when the high-side MOSFET is conducting or during the break-before-make interval.
In summary, a synchronous Buck converter comprises a high-side power MOSFET operated as a switch with a variable on-time used to control an output voltage, a synchronous rectifier MOSFET that conducts some portion of the time when the high-side MOSFET is off and never when the high-side MOSFET is on, and a rectifier diode which must carry the inductor's recirculation current during switching transients, whenever both MOSFET's are turned off.
Forced Diode Recovery
In switch-mode circuits comprising a MOSFET half-bridge, i.e., a push pull stage, driving an inductor, such as a synchronous Buck converter, two important factors must be considered. First, both MOSFETs cannot operate as on-state switches at the same time without shorting out the power source input. The practical realization of this first consideration is to guarantee both MOSFET switches are never on simultaneously, generally by using sequential circuitry to turn off an on-state MOSFET switch, i.e. break the circuit, before turning on the other MOSFET, i.e. to “make” a connection. Such break-before-make (BBM) circuitry, also known as “shoot-through” protection, cross-over protection, dead-time control, etc., means that every switching transition includes an intermediate state when all the switches are off and the intermediate node “floats” to a voltage not determined by the switches.
The second consideration is that during any interval when both MOSFETs are off and the common node between them, which is connected to the inductor, floats, the inductor will necessarily drive the floating node to a voltage outside the supply rails powering the circuit. Whenever an inductor drives a node voltage in a circuit outside the power supply rails, a diode must either become forward biased or must experience avalanche breakdown to maintain current continuity in the magnetized inductor at the instant of the transition, namely IL(t0−)=IL(t0+), i.e. to clamp the maximum inductor voltage. In general power applications, it is preferable to use the forward-biasing of a Schottky or a P-N junction diode rather than relying on an avalanche breakdown or Zener diode effect, primarily because of the lower voltage drop, reduced power dissipation and higher efficiency offered by the forward-biased diode as a voltage clamp.
In non-isolated switching power supply topologies like the Buck converter, the synchronous Buck converter, the boost converter, and the synchronous boost converter, disconnecting the inductor from the battery or other input power source causes the inductor to immediately force diode conduction. Diode conduction, however, leads to unwanted charge storage which not only can increase power losses but more importantly can result in increased noise, ringing, and instability during switching events.
Synchronous rectification does not eliminate the diode charge storage problem, since a synchronous rectifier MOSFET must be turned off before the other MOSFET is turned on, in order to meet the first consideration described above. The break-before-make interval allows the rectifier diode to conduct and store charge. In an integrated circuit or discrete implementation of power MOSFET, a silicon P-N junction diode parallel to the synchronous rectifier MOSFET conducts immediately upon switching off the synchronous rectifier MOSFET. Attempts to divert the current from the silicon diode using a discrete Schottky diode in parallel with the MOSFET offer limited benefits, especially since stray inductance prevents the Schottky diode from conducting within the short BBM interval.
In switched-inductor power circuits such as switching power supplies and PWM motor drives, significant noise can occur during rapid reverse-biasing of a power rectifier immediately following its forward-biasing, a condition known as forced diode recovery. FIGS. 4A-4C represent a phenomenological description of the forced-diode recovery process and its influence on switching transient generated noise in a synchronous Buck converter, e.g. in DC/DC converters topologically similar to synchronous Buck converter 20 in FIG. 1B. Specifically, circuit 50 in FIG. 4A illustrates an electrical equivalent of Buck converter 20 during diode recirculation immediately after high side MOSFET 25 is turned off, as represented by open switch 52.
In circuit 50, voltage source 51 represents the battery or other voltage input Vbatt, resistor 54 represents an idealized approximation of load 32, and voltage-source 57 represents charged capacitor 31 which for short duration transients can be modeled as an AC short. Fixed current source 53 is an idealized representation of inductor 27 operating under steady state switching conditions—a valid assumption so long that the clock's switching frequency is substantially greater than the resonant frequency of the LC filter.
Diode 55 represents the forward-biased silicon P-N junction intrinsic to MOSFET 25, and capacitor 56 represents charge stored in the forward biased junction. So long that the leakage current IDSS in open switch 52 is substantially zero, i.e. typically less than one microampere, then the inductor current is entirely carried by diode 55, or ID=IL. A voltage Vf develops across forward-biased diode 55 commensurate with this current level.
This condition persists during the entire BBM interval.
In FIG. 4B, circuit 60 represents converter 20 immediately after high-side MOSFET 25 is turned on. As a saturated device with a steadily rising gate voltage, MOSFET 25 is represented as a controlled current source 61 producing a relatively constant dl/dt and reverse biasing diode 55. Before Vx can rise, however, all the charge stored in rectifier diode 29 must be depleted. This stored charge comprises both depletion capacitance represented by capacitor 56 and minority carriers stored in “real” junction diode 55, referred to as “diffusion capacitance”. The transient current iC represents the current needed to discharge diffusion capacitance 56 while the current iRR describes the reverse recovery charge needed to overcome diffusion capacitance and turn-off the forward biasing of diode 56.
While depletion capacitance and diffusion capacitance each exhibit different transient characteristics, their combined impact determines the overall “diode recovery”, a phenomenon delaying the cessation of conduction in P-N diode 55 and postponing the rise of voltage Vx.
It should be noted, that transient simulations in commonly-used circuit simulators such as SPICE and its derivatives do not accurately predict diode recovery waveforms, since the compact mathematical model for a P-N diode lacks the two-dimensional physics describing diffusion capacitance. Accurately simulating forced diode recovery requires a physics-based two-dimensional device simulator such as PISCES, MEDICI, etc., driven by time dependent bias conditions imposed by the overall circuit or by coupling device and circuit simulation together (see R. K. Williams et al., Int. Symp. Power Semi Dev (ISPSD91); pp. 254-257 (IEEE, 1991)).
As a general observation, compact-model circuit simulation produces a more “ideal” forced diode recovery waveform than the behavior of a real diode by underestimating the amount of stored charge and its associated power loss, underestimating the recovery delay caused by stored minority carriers, and by underestimating the dVx/dt that occurs at the conclusion of the recovery transition. By underestimating the voltage slew rate in a “snappy” diode, simulation also predicts less ringing on the Vx pin than is observed in real circuits and thereby infers less noise and EMI problems than are actually encountered in physical systems. Another interpretation of this result is that any method that reduces dV/dt in compact-model circuit simulation is likely to produce an even greater improvement in real world implementations.
Circuit 70 in FIG. 4C illustrates synchronous Buck converter 20 immediately after high-side MOSFET 25 is turned on as a fully-enhanced on-state switch, represented as a resistor 72. The low-side diode 29 and synchronous rectifier MOSFET 28, now in their off state, are represented by open switch 75 exhibiting a leakage current IDSS that is substantially zero.
The recovery of diode 29 is illustrated in FIG. 5 as an overlay of its current and voltage waveforms versus time at the onset of reverse recovery. Prior to the transition diode 29 conducts current If, shown by line segment 81, and has a corresponding forward-bias voltage of Vf, shown by line segment 86. As the high side MOSFET 25 begins to conduct, it reduces the recirculation current flowing in diode 29, illustrated by sloping line segment 82.
The voltage across diode 29 diminishes only slightly due to the exponential nature of P-N diode conduction. At point 90 the current in the diode actually reverses direction, allowing current to momentarily flow from its cathode to its anode, backwards from normal conduction. Ideally, a diode will only let conduction occur when it is forward biased, i.e. when the current is flowing from its anode to its cathode. Because of unwanted stored charge, beyond point 90, reverse current is flowing in diode 55.
The magnitude of the reverse current increases until significant charge has been removed and can no longer support such levels of reverse current. At point 83 the reverse current reaches its peak value IRR then begins to decrease in magnitude along a more exponentially shaped curve 84. The totally integrated area of the reverse diode current versus time starting at point 90 and finishing at point 85, where the diode current is substantially zero, is defined as the reverse recovery charge QRR, having units of coulombs and expressed by the following:
      Q    RR    =            ∫                        t          @          pt                ⁢        .90                              t          @          pt                ⁢        .85              ⁢                            I          D                ⁡                  (          t          )                    ·              ⅆ        t            
The onset of the rise of the voltage Vx is delayed some time after the peak reverse current occurs but eventually begins to rise rapidly in line segment 87 as the last vestige of minority carrier charge is removed or recombines within the two-dimensional P-N junction. The voltage Vx (the drain voltage of MOSFET 25) then overshoots, shown by line segments 88, and after ringing then settles to a steady state value of [Vbatt−IL·RDS(switch)] at point 89.
Another problem with the high dV/dt following diode recovery is MOSFET false turn-on induced noise. After diode conduction ceases and the drain voltage Vx is rising rapidly, the equivalent circuit 100 of converter 20 can be represented as in FIG. 6A comprising a synchronous rectifier 101, a gate buffer 103, a temporarily saturated high-side MOSFET 102, and a fixed current source 104 representing inductor 27.
As illustrated, synchronous rectifier 101 comprises N-channel MOSFET 110, with integral gate-to-drain feedback capacitance 107 of magnitude Cdg, gate-to-source capacitance 108 of magnitude Cgs, and body-to-drain capacitance 109 of magnitude Cdb. The capacitance Cdb is in parallel with the MOSFET's drain-to-source terminals whenever the source and body are shorted, a common configuration in MOSFET power devices. Parasitic drain resistance 111 of magnitude rd, source resistance 112 of magnitude rs, and distributed gate resistance 106 of magnitude rg complete the model of MOSFET 110. The gate buffer 103 biasing MOSFET 110 into its off state includes a pull-down device 105 with a resistance Rdriver. Diode 113 represents the P-N junction in parallel with high side MOSFET 102.
The waveforms 120 of the gate voltage VG and drain voltage Vx of MOSFET 110 and the current If(switch) in high-side diode 113 are illustrated in FIG. 6B. Prior to time t1, the gate of MOSFET 110 is biased by gate buffer 103 to the voltage Vbatt, with switch 114 closed and switch 115 open. At this time the voltage Vx is biased below ground by an amount equal to −IL·RDS(sync rect) and high-side diode 113 remains reverse-biased.
At time t1, the gate of the synchronous rectifier 101 is driven by gate buffer 103 from Vbatt to ground, as shown by the transition from curve 121 to 122. This involves the opening of switch 114 and the closing of switch 115. The negative voltage across synchronous rectifier MOSFET 110 increases to Vf as the channel of MOSFET 110 is turned off, shown by the transition from curve 124 to 125, and diode 116 takes over the function of carrying the recirculation current through inductor 27.
At time t2, as the voltage Vx begins to rise rapidly along curve 129, capacitive displacement current flows through gate-to-drain capacitor 107 and forms a voltage divider with gate-to-source capacitor 108 and the series resistance of distributed gate resistance 106 and pull-down device 105. If this series resistance (rg+Rdriver) is sufficiently large, the voltage at the gate of MOSFET 110 (node VG′) can increase above the threshold voltage of MOSFET 110, as shown by curve 123, This momentarily causes synchronous rectifier MOSFET 110 to again conduct, triggering unwanted oscillations 126 in the voltage Vx node which vary in magnitude and in duration. The result is a burst of noise spread over a range of frequencies—noise especially problematic in communication applications. Controlling the gate voltage during high dV/dt transients is difficult since synchronous rectifier 101 includes seven passive elements and a P-N diode, all of which affect its terminal characteristics.
The oscillations can be further compounded if transient ringing 126 exceeds 600 mV, essentially one forward-biased diode voltage Vf above Vbatt, in which case high-side diode 113 conducts, as shown in curves 129A and 129B adding other charge storage and oscillatory modes. Only after some period of uncontrolled oscillations does drain voltage Vx finally settle to its final voltage as shown by line 127.
In summary, forced diode recovery in a synchronous Buck converter prior to high side conduction can lead to reverse rectifier currents and efficiency loss, high dV/dt slew rates, ringing, voltage overshoot, oscillations, forward-biasing of the high side MOSFET's diode, and uncontrollable bursts of noise spread across a range of frequencies. Unfortunately, all known hard switching converters, that is, converters other than resonant and quasi-resonant converters, require forced diode recovery for some interval to extract charge stored in a P-N junction.
One approach to prevent diode conduction in the MOSFET's intrinsic P-N junction is to connect the synchronous rectifier MOSFET in parallel with an external Schottky rectifier. The purpose of the Schottky diode is to divert the recirculation current of inductor 142 during the break-before-make interval into a lower-voltage-drop circuit path in parallel with the synchronous rectifier MOSFET. Unfortunately, as illustrated in equivalent circuit 140 of FIG. 7, this method does not work in high-frequency DC/DC converters since Schottky diode 146 includes stray inductance 147 that delays the onset of Schottky conduction whenever synchronous rectifier MOSFET 144 is off and P-N diode 145 conducts. By the time Schottky diode 146 begins to conduct, the break-before-make interval is over, high-side MOSFET 141 is conducting, the voltage at Vx is already rising, and forced diode recovery has already commenced.
Light Load Operation in Synchronous Buck Converters
Another factor in optimizing a DC/DC converter is its efficiency, operational stability, and noise behavior at low output power conditions, i.e. when the load is drawing a current one or two orders of magnitude lower than it draws during normal operation.
In this so called “light load” condition, the inductor conducts currents only slightly above zero. In some circumstances, the current in the inductor may actually reverse direction, oscillating between flowing toward the load, i.e. out of the converter, and from the load, i.e. into the converter's output.
FIGS. 8A-8C illustrate the intermediate voltage Vx and the inductor current IL in a synchronous Buck converter under three different load conditions. Specifically, FIG. 8A illustrates Vx and IL when the converter is operating at a full load condition where the average inductor current IL is far above zero. As described above, the voltage Vx switches between a slightly negative value during recirculation and a positive voltage slightly below Vbatt during high-side MOSFET conduction. The repeated period T1 represents converter operation in the fixed-frequency pulse width modulation (PWM) mode. When the Vx pulse has been reduced to its minimum width tmin, the constant oscillating period T1 represents the shortest interval where fixed frequency PWM operation can be maintained. If a lower output current is required and the clock period is not increased, the output voltage will start to rise and the converter will lose its ability to regulate.
FIG. 8B illustrates the operation of a Buck converter under a low current load resulting in a minimum inductor current 151 near zero. Under this condition, the period T must increase and the clock frequency drop to avoid a gradual rise in the converter's output voltage, i.e. T3>T2>T1. By using a fixed on-time pulse of minimum duration and by varying the off time according to feedback of the output voltage, the pulse frequency modulation is able to regulate the output through constant changes in the oscillating period. The disadvantage of PFM operation is that the variable frequency produces a varying frequency noise spectrum, but efficiency remains relatively high.
At even lighter loads, FIG. 8C illustrates the switching waveforms where the inductor current passes through zero, and negative conduction occurs in the synchronous rectifier MOSFET. At the time indicated by point 152, the current begins to flow from the load back into the converter, i.e. in a direction decreasing the energy stored on the switcher's output capacitor. At point 153, where the controller once again turns on the high-side MOSFET to refresh, i.e. to magnetize, the inductor, the negative current reaches a peak and begins to decrease in magnitude. At time point 154, the current turns positive and energy once again flows out of the converter and toward the load.
The operating state table for a synchronous Buck converter operating in light load is then modified to include current reversal, as shown in Table 3:
TABLE 3ModeHigh-SideLow-SideIL DirectionDiode BiasMagnetizationOn Switch (RDS)OffTo OutputReverse Bias(RB)BBMOffOffForward Bias(FB)RecirculationOffOn Switch (RDS)Shunted ForwardBias (FB)ReversalOffOn Switch (RDS)FromReverse BiasOutput(RB)BBMOffOffDependsDepends(RB/FB)RecoveryOn CurrentOffTo OutputReverseSourceRecovery
The “recirculate” and “reversal” states may oscillate any number of times depending on the current in the inductor in light load. Unfortunately, current reversal is energy inefficient, wasting energy by “sloshing” current back and forth between the inductor within the converter and the output capacitor. The problem of reverse current flow in the inductor occurs because a MOSFET can conduct in either polarity and with equal conductivity, so the magnitude of the “from load” current and the “to load” current may be nearly equal. As a result, leaving the synchronous rectifier MOSFET on during current reversal in light load lowers the converter's efficiency.
So while the synchronous rectifier never conducts when the high side MOSFET is on and conducting, and never conducts during the break-before-make, depending on the magnitude of inductor current it can stay on too long during recirculation leading to current reversal and oscillation between the reversal and recirculating states.
Since reversal and recirculating states alternate repeatedly at a frequency depending on the load, the PWM controller's instruction to turn on the high-side MOSFET occurs asynchronously, i.e. when the PWM controller decides it is needed. The converter therefore enters into the BBM state in an indeterminate polarity, with the inductor current flowing from the output or to the output depending on the last state of the converter. In any case, large reverse-currents lower efficiency, and may potentially further aggravate noise during BBM operation and diode recovery.
One remedy proposed by several workers is to detect when the reverse current condition is about to occur and to switch the synchronous rectifier MOSFET off. Theoretically, since the P-N diode in parallel with the synchronous rectifier MOSFET is reverse-biased under the current reversal condition, it cannot conduct and the inductor current will become discontinuous, i.e. interrupted, just as it behaves in a conventional Buck converter.
Turning off the synchronous rectifier during a light-load condition modifies the operating phases of the converter, as described in Table 4:
TABLE 4ModeHigh-SideLow-SideIL DirectionDiode BiasMagnetizationOn Switch (RDS)OffTo OutputReverse Bias(RB)BBMOffOffForward Bias(FB)RecirculationOffOn Switch (RDS)Shunted FBReversalOffOffZeroReverse Bias(RB)BBMOffOff0/ToDepends (~0/FB)OutputRecoveryOn CurrentOffTo OutputReverseSourceRecovery
As described, the charge, first BBM and recirculation phases behave as described previously. At the onset of current reversal, however the off low-side MOSFET is switched off, blocking current from flowing backwards into the converter from the output. The converter then alternates any number of times between the recirculate mode with its synchronous rectifier “on” and reversal mode where the synchronous rectifier MOSFET is “off”. The synchronous rectifier can be switched off by detecting when the current starts to reverse polarity or simply by disabling synchronous rectifier operation whenever the inductor current drops below a specified value. If the second BBM interval commences while the inductor current is zero, i.e. in the reversal phase, both MOSFETs remain off and no action is needed. If the BBM commences following the recirculation phase, then the synchronous rectifier must be shut off for the BBM interval and forced diode recovery occurs before the cycle repeats. Thus, in this prior art approach, the synchronous MOSFET is always off and non-conducting during high-side MOSFET conduction, during break-before-make operation, and during light-load current reversal.
With its synchronous rectifier biased off during light load reverse conduction, a synchronous Buck behaves like a conventional Buck converter except that the rectifier is realized as a silicon P-N diode rather than as Schottky diode. The waveforms for the intermediate voltage Vx and the inductor current IL in the discontinuous operation of a Buck converter under light load are illustrated in FIGS. 9A-9C.
FIG. 9A illustrates the inductor current IL commencing with high-side MOSFET turn-on at time to and increasing until at point 161 and time t2, when the high side MOSFET is turned off and after a brief BBM interval (too short to illustrate clearly on this the time scale shown), the low-side synchronous rectifier MOSFET is turned on. Corresponding to the inductor current of FIG. 9A, the voltage Vx, illustrated by line 162 in FIG. 9B, is approximately equal to Vbatt during the magnetizing interval from time t1 to time t2.
After a short BBM interval 164, the low-side synchronous rectifier MOSFET is turned on, forcing Vx to slightly below ground during the interval 163 from t2 to t3. During this interval, the inductor current IL ramps down toward zero, and at time t3, reverse current in the synchronous rectifier MOSFET and the inductor is prevented by shutting off the low-side MOSFET.
Immediately upon shutting off the synchronous rectifier MOSFET, oscillations 165 of the voltage Vx commence. These oscillations are attributable to the RLC tank circuit shown in circuit 170 of FIG. 10, where the “tank” includes a low-side MOSFET 174, with a depletion capacitance 176, a diode diffusion capacitance 175, a stray inductance 178 and a small-signal AC series resistance 177, and where the inductor 171 includes a winding resistance 179 of magnitude rcoil. The oscillating tank is completed by filter capacitor 172 and load impedance 173. While the equivalent LC resonant frequency determines the natural frequency of oscillation, the damping constant is determined by the equivalent RC time constant. Any stored charge in P-N diode 175 also affects the oscillating behavior of the circuit when both the high-side MOSFET 180 and the low-side MOSFET 174 are off.
High side MOSFET 180 remains off in this interval and is illustrated for clarity as an open switch. Under this condition, coil 171 of inductance L cannot be represented as a current source since the oscillations will occur near the passive circuit's resonant frequency, not driven by a significantly higher clock frequency. The oscillations 165 continue until time t4, when the high side MOSFET 180 is turned on by the PWM controller, and again the coil 171 is magnetized.
FIG. 9C illustrates the same behavior but where oscillations 166 die out faster than oscillations 165. The voltage Vx at time t4 depends on a number of parameters primarily from passive network 170 and preexisting conditions. Note on the scale drawn, the BBM interval is only illustrated as a short spike in the negative Vx voltage. In any event oscillations in the voltage Vx give rise to further unwanted noise generation and the potential for unwanted electromagnetic interference (EMI).
Synchronous Boost Converter Operation
Similar issues with uncontrolled charge storage in P-N diodes occur in synchronous boost converters. Synchronous boost converter 190 shown in FIG. 11 includes an N-channel low-side power MOSFET 191, a battery-connected inductor 193, and a “floating” synchronous rectifier MOSFET 192, with the gates of MOSFETs 191 and 192 driven by a break-before-make circuit 195 and controlled by a PWM controller 196 in response to a feedback voltage VFB from the output of converter 190, which is present across a filter capacitor 194. The synchronous rectifier MOSFET 192 is considered “floating” in the sense that its source and drain terminals are not permanently connected to any supply rail, i.e. ground or Vbatt.
Diode 197 is a P-N diode intrinsic to synchronous rectifier MOSFET 192, regardless of whether synchronous rectifier MOSFET 192 is a P-channel or an N-channel device. Schottky diode 199 may be included in parallel with MOSFET 192 but may include series inductance (not shown). Diode 198 is a P-N junction diode intrinsic to N-channel low-side MOSFET 191.
At start-up, when power is first connected to converter 190, Vout is pre-biased to a positive voltage Vout(0−) because diode 197 becomes forward biased and charges capacitor 194 to a voltage one forward-biased diode-drop below the battery input, i.e. Vout(0−)=Vbatt−Vf. After pre-biasing, the operation of synchronous boost converter 190 commences according to Table 5:
TABLE 5ModeLow-SideFloatingIL DirectionDiode BiasMagnetizationOn Switch (RDS)OffTo GroundReverse Bias (RB)BBMOffOffTo OutputForward Bias (FB)RecirculationOffOn Switch (RDS)Shunted FBBBMOffOffForward Bias (FB)RecoveryRamping OnOffReverse RecoveryCurrent Source
The operation of synchronous boost converter 190 involves turning on low-side MOSFET 191 in its linear region of operation, i.e. operating MOSFET 191 as a “switch”, and magnetizing inductor 193, while synchronous rectifier MOSFET 192 remains off. Assuming that the output of converter 190 is pre-biased to some potential above ground to a voltage Vout(0−) then turning on MOSFET 191 pulls Vx to a voltage near ground and diode 197 is reverse-biased.
At time t1, low side MOSFET 191 is turned off and inductor 193 drives voltage Vx positive to a potential above Vout(0−), forward-biasing diode 197 and charging capacitor 194 to a voltage higher than Vbatt, thereby “boosting” the input voltage. As shown in the waveform of Vx in FIG. 12A, the voltage transient 200 may momentarily overshoot and ring to a voltage above Vout+Vf, as illustrated by oscillations 202. Eventually, the inductor voltage stabilizes at the voltage equal to Vout+Vf, where Vout gradually increases on a cycle-by-cycle basis.
With the inductor no longer being magnetized, the inductor current IL, shown in FIG. 12B, begins to decay from its peak value 208 at a steady rate (line 209). The inductor current IL is initially carried entirely by forward biased diode 197, as shown by the If curve 212 in FIG. 12C.
After a break-before-make interval, at time t2=t1+tBBM, synchronous rectifier MOSFET 192 turns-on, diverting current from diode 197 into MOSFET 192 and lowering the voltage Vx to Vbatt+I·RDS(sync rect), as shown by curve 203 in FIG. 12A. The MOSFET drain current ID, shown by curve 214, replaces most of current If in diode 197, illustrated by curve 213 in FIG. 12C, while IL continues to decline.
After some period of time, PWM controller 196 determines that the inductor 193 needs to be magnetized again, and accordingly at time t3 synchronous rectifier 192 is turned off, the voltage Vx returns to its higher potential (line 204), and diode 197 carries the full inductor current, as shown by curve 215 in FIG. 12C. During this second BBM interval, charge becomes stored within P-N diode 197.
Then, at time t4=t3+tBBM, low-side MOSFET 191 again turns on, but because of the charge stored in diode 197, the voltage Vx cannot change instantly. As diode 197 becomes reverse-biased and is forced into diode recovery, its current drops rapidly, overshoots and reverses direction as shown by curves 216 and 217, consistent with the same reverse recovery terminal characteristics described previously in FIG. 5. The forced diode recovery results in a high dV/dt, as shown by Vx transient 205 in FIG. 12A, further leading to voltage overshoot and ringing 206, which potentially can even momentarily drop below ground and risk forward biasing diode 198. As a result of the high slew rate and voltage overshoot, substantial noise and EMI are generated.
Thereafter, converter 190 returns to magnetizing the inductor 193, the current begins rising from its minimum value 210 at a steady rate (line 211), and the voltage on the drain of the low-side MOSFET 191 equilibrates at I·RDS(sync rect), as shown by line 207 in FIG. 12A.
As in a synchronous Buck converter, noisy forced-diode recovery in a synchronous boost converter occurs due to unwanted diode conduction and charge storage during the break-before-make interval just prior to magnetizing the inductor. As shown in Table 5, in a prior art synchronous boost regulator, floating synchronous rectifier MOSFET 192 is never on and conducting when low-side MOSFET 191 is on and conducting, or during break-before intervals when both MOSFETs are off.
Like their synchronous Buck counterparts, synchronous boost converters also exhibit current reversal in light load applications, leading to a loss of efficiency at low output currents, unless the synchronous rectifier MOSFET is turned off prior to current reversal. Turning off the synchronous rectifier MOSFET, while preventing reverse current flow, results in discontinuous conduction and LRC oscillations, causing unwanted noise. As shown in the waveforms of FIG. 13A, the inductor current IL reaches its peak value 220 at time t1, the end of the magnetizing cycle. The shut off of the low side MOSFET 191 leads to a decay in inductor current (line 221). During this period the voltage Vx, shown in FIG. 13B, exhibits a transient (line 225) and ringing 226 before finally, after a break-before-make interval, settling to a voltage equal to Vout+I·RDS(sync rect) (line 227). If the inductor current is too small, however, at time t3, the current will reverse direction (dashed line), reaching an energy-wasting peak reverse current at point 223, unless the synchronous rectifier is shut off.
By shutting off the synchronous rectifier at time t3 the reverse current is prevented and the converter's light load efficiency improved, but unfortunately the voltage Vx immediately exhibits oscillations 228, generating electrical and radiated noise. At time t5 the low-side MOSFET 191 is again turned on, ramping current (line 224) from zero while Vx exhibits a rapid negative going voltage transient (line 229) with a high dV/dt, potentially causing negative voltage overshoot and further ringing and noise generation 230. Depending on when during or subsequent to oscillations 228 time t5 occurs, this transition may cause forced diode recovery, further exacerbating the noise problem.
Thus, in this prior art synchronous boost converter, the synchronous MOSFET is always off and non-conducting during low-side MOSFET conduction, during break-before-make operation, and during light-load current reversal.
Other Effects of Uncontrolled Diode Conduction
In full-load operation, diode conduction in synchronous Buck and synchronous boost converters leads to unwanted charge storage, rapid transient behavior, and forced-diode-recovery-induced noise. High slew rates also can result in false turn-on and by introducing substrate noise, provoke displacement-current-induced CMOS latch-up. CMOS latch-up is a potentially damaging condition wherein an integrated circuit exhibits loss of control and high currents resulting from parasitic PNPN thyristor conduction.
In light-load conditions, the requirement to turn off the synchronous rectifier MOSFET and operate a converter as a non-synchronous Buck or a non-synchronous boost converter in discontinuous mode to prevent current reversal in the MOSFET leads to other unwanted oscillations and noise, whereby stored charge in the P-N diode can further influence circuit stability.
The various conditions of synchronous Buck and boost converters are summarized in the flow chart of FIG. 14. Using the term “switch” for the MOSFET connected to the power source and the term SR for the diode and parallel synchronous rectifier MOSFET supporting recirculation, the operation of both Buck and boost converter topologies with synchronous rectifiers follow the same flow chart. This flow starts with the magnetize operation 240, where the switch is on and in its linear region, i.e. as a resistor RDS, and the synchronous rectifier MOSFET is off. Transition to the 1st BBM interval 241 involves turning the switch off. The 1st BBM interval 241 is followed by recirculation 242 where the synchronous rectifier is on. Some noise occurs during the transition into the 1st BBM interval 241.
Under normal operation, the synchronous rectifier MOSFET is then turned off during the 2nd BBM interval 243, again generating noise. In light-load conditions, however, recirculation state 242 and the current reversal state 245 alternate in an oscillatory manner, where the synchronous rectifier is shut off entering the reversal state 245 and reactivated returning to state 242. Oscillations and noise are problematic during reversal state 245. Transitioning into the 2nd BBM interval during light load may occur directly from the reversal condition 243 or from the recirculation state 242, but with differing noise characteristics.
After the 2nd BBM interval 243, forced diode recovery 244 commences as the switch MOSFET temporarily becomes saturated, potentially generating substantial electrical noise. After recovery, when the MOSFET switch is once again in its linear, i.e. RDS region of operation, the magnetize phase 240 commences and the entire cycle repeats.
Thus, noise occurs during several phases of a converter's operation—during the 1st BBM interval 241; during light-load current reversal 245; during the 2nd BBM interval 243; and during the forced diode recovery condition 244. All of these noise-generating conditions involve charge storage in a P-N junction diode.
In conclusion, uncontrolled diode conduction and charge storage occurring in synchronous Buck and synchronous boost converters during break-before-make operation and also during light-load conduction result in undesirable losses in efficiency, the generation of unwanted electrical and radiated noise, and numerous other potential issues such as false turn-on of an off-state MOSFET. Problems with BBM operation, oscillations and poor efficiency during light load plague both synchronous boost and synchronous Buck converters. What is needed is a means by which to simultaneously control noise and improve efficiency in switching power supplies with synchronous rectification by controlling the amount of stored charge in the P-N diode associated with a synchronous rectifier MOSFET.